Over the past few years, we have been actively developing and improving the SECDA-TFLite toolkit, and we are now pleased to announce the public release of SECDA-TFLite v2!
The new release of SECDA-TFLite v2 includes many new features and additional tooling that allow for easier and faster design and evaluation of new FPGA-based accelerators.
Quick summary of the new tools: Benchmarking Suite for automated evaluation and testing of new accelerators; Hardware Automation for single command generation of accelerator bitstream; SECDA Delegate generation, which automatically creates template accelerators as required by the user; and many more features listed in our release documents.
We aim to have a community-driven research platform around SECDA-TFLite, and we welcome our colleagues from both academia and industry to reach out to us for questions, requests, feedback, or potential points of collaboration.
Github Repository: https://github.com/gicLAB/SECDA-TFLite
